PHLEGM v8 / Checkpoint 56 - Complete SPC700 opcode inventory
All 256 documented SPC700 opcode bytes now map to numeric-compiled, data-driven micro-operations in cfg/support/snes-io/S-SMP-PORT/spc700-opcodes.config.phlegm.
65 previously trapped opcodes implemented: TCALL vectors, bit instructions, 16-bit operations, DP pointer modes, BRK/RETI/PCALL, MOV/CMP/ALU, multiplication, division, BCD and sleep.
All per-opcode cycles supplied for the newly implemented instructions.
Generic VM primitives reside in src/lib/spc700-support.bi; no native opcode-specific dispatch or ROM-specific bypass introduced.
Reference: https://wiki.superfamicom.org/spc700-reference and https://snes.nesdev.org/wiki/SPC-700_instruction_set
Not a claim of cycle-exact emulation: IPL ROM authenticity, timers, DSP waveform synthesis, interrupts and CPU/APU arbitration need validation.
FreeBASIC native compile and game runtime validation require native Windows test or FreeBASIC toolchain.
